1. Field of the Invention
The present invention relates to recycling of a donor wafer having a buffer layer after having transferred a thin semiconductor layer from the donor wafer to a receiving substrate.
2. Background of the Invention
The term “buffer layer” generally refers to a transition layer between a first crystalline structure such as a substrate and a second crystalline structure that has the primary function of modifying properties of the material, such as structural or stoichiometric properties or atomic surface recombination properties.
For a buffer layer, the atomic surface recombination properties may make it possible to obtain a second crystalline structure that has a lattice parameter of that differs substantially from that of the substrate. To this end, the buffer layer may have a composition which varies gradually with thickness, the gradual variation of components of the buffer layer being directly associated with a gradual variation of its lattice parameter.
The buffer layer may also have a more complex form such as a variation in composition with a variable rate, a sign inversion of the rate or discontinuous jumps in composition, possibly completed with a constant composition layer for containing defects.
A metamorphic embodiment of a buffer layer is also possible, such as a metamorphic epitaxy.
A layer or a superposition of layers produced on the buffer layer may be removed from the donor wafer in order to be transferred to a receiving substrate, in order to produce a particular structure.
A major application of transferring thin layers formed on a buffer layer relates to the formation of strained silicon layers. A material is “strained” in tension or in compression if its lattice parameter in the interface plane is greater or less than its nominal lattice parameter, respectively. Alternatively, a layer is made of a “relaxed” material if its lattice parameter in the interface plane is substantially close to its nominal lattice parameter.
When a layer of silicon is strained in tension, some properties, such as the electron mobility of the material, are improved. Other materials such as SiGe may also be subjected to such an operation.
The transfer of layers such as these onto a receiving substrate may be achieved, for example, by the so-called SMART-CUT® process. Such processes make it possible to produce structures such as SOI (Semiconductor On Insulator) structures.
For example, after detaching a layer of relaxed SiGe from a donor wafer, the structure obtained may then act as a support for growing silicon. Since the nominal lattice parameter of SiGe (which depends on the germanium content) is greater than the nominal lattice parameter of silicon, growth of silicon on the SGOI (Silicon-Germanium On Insulator) pseudo-substrate obtained makes it possible to strain the silicon layer in tension.
An example of using such a process to produce a Si/SGOI structure is described in the IBM document by L. J. Huang et al. entitled “SiGe-On-Insulator prepared by wafer bonding and layer transfer for high-performance field-effect transistors”, Applied Physics Letters, 26 Feb. 2001 vol. 78, No. 9, incorporated herein by reference. Other applications of metamorphic growth are possible, especially with semiconductors of the III-V family.
Transistors are commonly produced using GaAs-based or InP-based technologies. Generally, electron mobility is higher in InP materials than in GaAs materials. By combining an InP layer and an InGaAs or InAlAs layer, it is possible to improve electron mobility in the material even further.
However, the ability to economically produce and market components using InP technology is limited. Using GaAs technology can be expensive and material availability is sometimes problematic. Also, these materials suffer from mechanical weakness and small sizes. For example, the maximum diameter obtainable for a InP wafer is typically about 4 inches compared with 6 inches for GaAs.
One possible solution to this problem may be found with reference to the receiving substrate. For example, an InP layer may be detached and obtained by metamorphic epitaxy of a buffer layer on a GaAs substrate. However, the metamorphic production technique is complex.
Certain detachment processes, such as a process of the “etch-back” type, generally lead to destruction of the remaining part of the substrate and of the buffer layer during detachment. In some other detachment processes, such as a SMART-CUT® process, the substrate is recycled but the buffer layer is lost. Optimizing and producing such a buffer layer may therefore involve a lengthy, difficult and expensive implementation.
Moreover, internal strains due to the variations in composition may cause the appearance of a high rate of crystalline defects, such as dislocations and point defects. These internal strains, and therefore the generation of defects, may be minimized by increasing the thickness over which the lattice parameter varies. It is mainly for this reason that buffer layers are usually thick, with a typical thickness ranging from one to a few micrometers. The thickness of the buffer layer is further restrained by economic considerations and, at times, certain structural complexities.
Thus there remains a need in the art for a more economical and practical technique for detaching layers of semiconductor material, and this is now provided by the present invention.